1 GByte/s SCI Transport Layer Chipset by Vitesse Semiconductor Corporation

Overview

The trend in computer system architecture is away from large custom CPUs and toward multi-processor (MP) systems. This is particularly true for on-line transaction processing (OLTP) and other applications which involve manipulation of large data bases. The trend in MP systems, in turn, is toward greater number of processors operating at higher clock rates. This implies in general higher interconnection bandwidth, while maintaining low latency, and greater bus performance. Current multi-processor systems rely on backplane busses for processor and memory interconnection. Next generation processors need bandwidth greater than physical busses can provide. Moreover, as bus clock rates increase, backplane busses for next generation multi-processor systems become very difficult to design, costly and not very scalable. The Scalable Coherent Interface (SCI) (ANSI/IEEE standard 1596) is a high bandwidth packet based point to point connection protocol which overcomes the connection bottleneck by replacing a multi-tap physical bus with a unidirectional ringlet-based point to point connection.

At the heart of SCI is the requirement for a VLSI function which can handle the packet traffic at very high speed. The significance of SCI for multi-processor system architecture is that it provides a very effective way to at once achieve performance scalability, cost scalability and fault tolerance. Figure 1 illustrates a typical application of SCI in MP systems. Here a 4 processor node is illustrated in which a physical high performance bus interconnects the processors, main memory and I/O bridge, as well as an SCI sub-system. This serves to interconnect similar quad processor nodes. A key feature of SCI is that it provides for tightly coupled systems with a common global memory map. The SCI sub-system in fig. 1 thus appears as a level 3 cache controller. The interface and handshake with the host bus is specific to the processor bus, but the other parts of the SCI subsystem are generic. Vitesse manufactures a chip-set which handle the transport of SCI packets between nodes at 1Gbyte/sec. Figure 2 is an example of an SCI ringlet and shows the use of the Vitesse parts in a 4-node ring. The VSC 7201a controls the flow of packets on and off the ringlet and between the nodes. The VSC 7203 is not strictly necessary to complete a ringlet, but use of these chip provides for fault tolerance by allowing for electronic bypassing of a faulty node.

The VSC 7201a and 7203 are commercially available in the open market, but they were developed principally with the help of Sequent Computer Systems, and are featured in that company's next generation systems based on their "NUMA-Qá" architecture. Other OEMs, most notably Unisys, were also involved in the early definition of the Vitesse SCI products. The VSC 7201a "DataPump" is a GaAs VLSI which handles SCI packets at 1GByte/sec bandwidth. The chip, briefly described in the attached data sheet, is responsible for sending and receiving data packets using SCI physical layer protocols. The second chip, the VSC 7203, is a node Bypass circuit which serves to implement fault tolerance in a multi-processor environment.

The SCI links are source synchronous. On-board PLL (in both chips) multiplies a reference clock (~66 MHz) to generate the internal 500 MHz clock. This clock is used to clock SCI output link flip-flops. The SCI input link is clocked using the received SCI strobe. It is not in phase with the internal 500 MHz clock and has an elastic buffer at the input link to synchronize received data to the internal 500 MHz clock domain. The Node Interface Bus runs off a separate, externally supplied clock (typically 66 MHz). The DataPump and the node bypass chip have synchronizers to handle communication between this clock domain and the 500 MHz clock domain.

7201a datasheet in Adobe Acrobat PDF

7203 datasheet in Adobe Acrobat PDF

Factory Contact

Ira Deyhimy
Vitesse Semiconductor Corporation
741 Calle Plano
Camarillo,  Ca.  93012
Ph: (805) 388-7511
Fx: (805) 987-5896
e-mail:  ira@vitsemi.com

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