SerialExpress heritage

General principles

SerialExpress can be viewed as an extension of the processor/memory bus, extending outside of the motherboard chassis. Although point-to-point cabling is used, the protocols reflect a backplane heritage, with the following characteristics:

The assumption of a memory-mapped read/write interface significantly different from networks, like Ethernet, or channels (like Fibre Channel). The intent is to efficiently support small and large data transfers, eliminating the processor from the task of intervening in most transfers.

Many of the SerialExpress protocols represent refinements of other cable-friendly IEEE 'bus' Standards, including:

Leveraged Serial Bus protocols

Properties of SerialExpress that were derived from Serial Bus, rather than SCI, include the following:

Leveraged SCI properties

Properties of SerialExpress that were derived from SCI, rather than Serial Bus, include the following:

Distinct SerialExpress properties

Properties of SerialExpress that were derived from SCI, rather than Serial Bus, include the following:

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Last modified: May 4, 1997
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Send mail to dbg@scizzl.com with questions or comments about this web site.
Last modified: May 4, 1997
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  • Pr ˰e time. Wall-clock synchronization protocols compensate for wiring delays, assuming identical out-and-back delays, yielding improved clock-synchronization accuracnct Seri аP ties < ˰operties of SerialExpress that were derived from SCI, rather than Serial Bus, include the following: